These 8-bit registers feature totem-pole TRI-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads The high-impedance state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components They are particularly attractive for implementing buffer registers I O ports bidirectional bus drivers and working registers The eight inverting latches of the AS533 are transparent Dtype latches meaning that while the enable (G) is high the Q outputs will follow the complement of the data (D) inputs When the enable is taken low the output will be latched at the complement of the level of the data that was set up A buffered output control input can be used to place the eight outputs in either a normal logic state (high or low logic