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| Partname: | 74F109PC |
| Description: | Dual JK Positive Edge-Triggered Flip-Flop |
| Manufacturer: | National Semiconductor |
| Datasheet: | PDF (133K).
Click here to download *) |
The 'F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to 'F74 data sheet) by connecting the J and K inputs. Asynchronous Inputs: |
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Click here to download 74F109PC Datasheet*) |
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