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| Partname: | 54LS114 |
| Description: | Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears |
| Manufacturer: | National Semiconductor |
| Datasheet: | PDF (118K).
Click here to download *) |
The 'LS114 features individual J K and set inputs and common clock and common clear inputs When the clock goes HIGH the inputs are enabled and data will be accepted The logic level of the J and K inputs may be allowed to change |
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Click here to download 54LS114 Datasheet*) |
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