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Partname:MPC9100FA
Description:Dual PLL clock generator
Manufacturer:Motorola
Package:TQFP
Pins:32
Oper. temp.:0 to 70
Datasheet:PDF (111K).
Click here to download *)

The MPC9100 is a dual PLL phase locked loop clock generator. The device synthesizes a 14.318 MHz input reference to provide a buffered copy of the input reference, a 31.3344MHz clock output and a 45.1584 clock output.

Click here to download MPC9100FA Datasheet
Click here to download MPC9100FA Datasheet
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