The MCM67T415 is a 245,760 bit cachetag static RAM designed to support Pentium microprocessors at bus speeds up to 66 MHz. It is organized as 16K words of 15 bits each and is fabricated using Motorola`s high performance, silicon gate BiCMOS technology. There are twelve common I/O tag bits and three separate I/O status bits. A 12bit comparator is onchip to allow fast comparison of the 12 stored tag bits with the current tag input data. An active high MATCH output is generated when the valid bit is true and these two groups of data are the same for a given address.