The MC74LVQ646 is a high performance, noninverting octal transceiver/registered transceiver operating from a 2.7 to 3.6V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. The MC74LVQ646 is suitable for memory address driving and all TTL level bus oriented transceiver applications. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes from a LOWtoHIGH logic level. Output Enable (OE) and DIR pins are provided to control the transceiver outputs. In the transceiver mode, data present at the high impedance port may be stored in either the A or the B register or in both. The select controls (SBA, SAB) can multiplex stored and realtime (transparent mode) data. The direction control (DIR) determines which bus will receive data when the enable OE is active LOW. In the isolation mode (OE HIGH), A data may be stored in the B register or B data may be stored in the A register. Only one of the two buses, A or B, may be driven at one time.