|
|
|
|
| Partname: | MC74ACT112D |
| Description: | Dual JK negative edge-triggered flip-flop |
| Manufacturer: | Motorola |
| Package: | P-SOIC |
| Pins: | 16 |
| Oper. temp.: | -40 to 85 |
| Datasheet: | PDF (191K). Click here to download *) |
The MC74AC112/74ACT112 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J and K inputs together. Asynchronous Inputs: |
|
 Click here to download MC74ACT112D Datasheet*) |
 |
| *)Datasheets downloading from ChipDocs is only for our members (paid service). REGISTER NOW for your membership. |
|
|
|