The MC14510B synchronous up/down BCD counter is constructed with MOS Pchannel and Nchannel enhancement mode devices in a monolithic structure. The counter consists of type D flipflop stages with a gating structure to provide type T flipflop capability. This counter can be preset by applying the desired value in BCD to the Preset inputs (P1, P2, P3, P4) and then bringing the Preset Enable (PE) high. The direction of counting is controlled by applying a high (for up counting) or a low (for down counting) to the UP/DOWN input. The state of the counter changes on the positive transition of the clock input. Cascading can be accomplished by connecting the Carry Out to the Carry In of the next stage while clocking each counter in parallel. The outputs (Q1, Q2, Q3, Q4) can be reset to a low state by applying a high to the Reset (R) pin.