The MC10H/100H607 is a 6bit, registered PECL to TTL translator. The device features differential PECL inputs for both data and clock. The TTL outputs feature 48mA sink, 24mA source drive capability for driving high fanout loads or transmission lines. The asynchronous master reset control is an ECL level input. With its differential PECL inputs and TTL outputs the H607 device is ideally suited for the receive function of a HPPI bus type boardtoboard interface application. The on chip registers simplify the task of synchronizing the data between the two boards.