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Partname: | V62C518256L-70T |
Description: | 32K x 8 static RAM |
Manufacturer: | Mosel Vitelic |
Package: | TSOP |
Pins: | 28 |
Oper. temp.: | 0 to 70 |
Datasheet: | PDF (54.7K). Click here to download *) |
The V62C518256 is a 262,144-bit static random access memory organized as 32,768 words by 8 bits. It is built with MOSEL VITELIC's high performance CMOS process. Inputs and threestate outputs are TTL compatible and allow for direct interfacing with common system bus structures. |
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![Click here to download V62C518256L-70T Datasheet](../../../pndecoder/datasheets/MOSEL/img/000210.gif) Click here to download V62C518256L-70T Datasheet*) |
![](http://www.chipdocs.com/common/img/1x10t.gif) |
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