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Partname:V54C333322V-5
Description:3.3V ultra-high performance 1M x 32 SDRAM 2 banks x 512Kbit x 32
Manufacturer:Mosel Vitelic
Package:TQFP
Pins:100
Oper. temp.:0 to 70
Datasheet:PDF (124K).
Click here to download *)

The V54C333322V is a 33,554,432 bits synchronous high data rate DRAM organized as 2 x 524,288 words by 32 bits. The device is designed to comply with JEDEC standards set for synchronous DRAM products, both electrically and mechanically. Synchronous design allows precise cycle control with the system clock. The CAS latency, burst length and burst sequence must be programmed into device prior to access operation.

Click here to download V54C333322V-5 Datasheet
Click here to download V54C333322V-5 Datasheet
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