The MS7200L/7201AL/7202AL are dual-port static RAM based CMOS First-In/First-Out (FIFO) memories organized in nine-bit wide words. The devices are configured so that data is read out in the same sequential order that it was written in. Additional expansion logic is provided to allow for unlimited expansion of both word size and depth. The dual-port RAM array is internally sequenced by independent Read and Write pointers with no external addressing needed. Read and write operations are fully asynchronous and may occur simultaneously, even with the device operating at full speed. Status flags are provided for full, empty, and half-full conditions to eliminate data underflow and overflow. The x9 architecture provides an additional bit which may be used as a parity or control bit. In addition, the devices offer a retransmit capability which resets the Read pointer and allows for retransmission from the beginning of the data. The MS7200L/7201AL/7202AL are available in a range of frequencies from 10 to 30 MHz (33 - 100 ns cycle times). A low power version with a 500A power down supply current is available. They are manufactured on Mosel-Vitelic's high performance 1.2 CMOS process and operate from a single 5V power supply.