|
|
Partname: | SY10E167JCTR |
Description: | 6-BIT 2:1 MUX-REGISTER |
Manufacturer: | Micrel |
Datasheet: | PDF (157K). Click here to download *) |
The SY10/100E167 offer six 2:1 multiplexers followed by D flip-flops with single-ended outputs, designed for use in new, high-performance ECL systems. The Select (SEL) control allows one of the two data inputs to the multiplexer to pass through. The two external clock signals (CLK1, CLK2) are gated through a logical OR operation before use as control for the six flip-flops. The selected data are transferred to the flip-flops on the rising edge of CLK1 or CLK2 (or both). |
|
Click here to download SY10E167JCTR Datasheet*) |
|
*)Datasheets downloading from ChipDocs is only for our members (paid service). REGISTER NOW for your membership. |
|
|
|