The ispLSI 1032EA is a High Density Programmable Logic Device containing 192 Registers, 64 Universal I/O pins, four Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 1032EA features 5V in-system programmability (ISPTM) and in-system diagnostic capabilities via IEEE 1149.1 Test Access Port. The ispLSI 1032EA device offers non-volatile reprogrammability of the logic, as well as the interconnects to provide truly reconfigurable systems. A functional superset of the ispLSI 1032 architecture, the ispLSI 1032EA device adds user selectable 3.3V or 5V I/O and open-drain output options.