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| Partname: | MACHLV210-15JC |
| Description: | High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 15ns |
| Manufacturer: | Lattice Semiconductor Corp. |
| Package: | PLCC |
| Pins: | 44 |
| Oper. temp.: | 0 to 70 |
| Datasheet: | PDF (221K).
Click here to download *) |
The MACHLV210 is a member of the highperformance EE CMOS MACH 2 device family. This device has approximately six times the logic macrocell capability of the popular PAL22V10 at an equal speed with a lower cost per macrocell. It is architecturally identical to the MACH210, with the addition of I/O pull-up/pull-down resistors and low-voltage, low-power operation. |
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Click here to download MACHLV210-15JC Datasheet*) |
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