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| Partname: | MACH120-18JI |
| Description: | High-performance EE CMOS programmable logic, 48 macrocells, 48 outputs, 48 flip-flops; 4 clock choices, 18ns |
| Manufacturer: | Lattice Semiconductor Corp. |
| Package: | PLCC |
| Pins: | 68 |
| Oper. temp.: | -40 to 85 |
| Datasheet: | PDF (171K).
Click here to download *) |
The MACH120 consists of four PAL blocks interconnected by a programmable switch matrix. The switch matrix connects the PAL blocks to each other and to all input pins, providing a high degree of connectivity between the fully-connected PAL blocks. This allows designs to be placed and routed efficiently. |
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Click here to download MACH120-18JI Datasheet*) |
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