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Partname: | ISPLSI2192VL-100LT128 |
Description: | 100 MHz 2.5V in-system prommable superFAST high density PLD |
Manufacturer: | Lattice Semiconductor Corp. |
Package: | TQFP |
Pins: | 128 |
Oper. temp.: | -55 to 125 |
Datasheet: | PDF (163K). Click here to download *) |
The ispLSI 2192VL is a High Density Programmable Logic Device containing 192 Registers, nine Dedicated Input pins, three Dedicated Clock Input pins, two dedicated Global OE input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 2192VL features in-system programmability through the Boundary Scan Test Access Port (TAP) and is 100% IEEE 1149.1 Boundary Scan Testable. The ispLSI 2192VL offers nonvolatile reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable systems. |
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![Click here to download ISPLSI2192VL-100LT128 Datasheet](../../../pndecoder/datasheets/LATIC/img/000022.gif) Click here to download ISPLSI2192VL-100LT128 Datasheet*) |
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