The ispLSI 2128V is a High Density Programmable Logic Device available in 128 and 64 I/O-pin versions. The device contains 128 Registers, eight Dedicated Input pins, three Dedicated Clock Input pins, two dedicated Global OE input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 2128V features insystem programmability through the Boundary Scan Test Access Port (TAP). The ispLSI 2128V offers nonvolatile reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable systems.