The ispLSI 2032VE is a High Density Programmable Logic Device that can be used in both 3.3V and 5V systems. The device contains 32 Registers, 32 Universal I/O pins, two Dedicated Input Pins, three Dedicated Clock Input Pins, one dedicated Global OE input pin and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 2032VE features in-system programmability through the Boundary Scan Test Access Port (TAP) and is 100% IEEE 1149.1 Boundary Scan Testable. The ispLSI 2032VE offers non-volatile reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable systems.