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| Partname: | GAL6001B-30LP |
| Description: | High performance E2 CMOS FPL generic array logic |
| Manufacturer: | Lattice Semiconductor Corp. |
| Package: | PDIP |
| Pins: | 28 |
| Oper. temp.: | -55 to 125 |
| Datasheet: | PDF (234K).
Click here to download *) |
The GAL6001 has 10 programmable Output Logic Macrocells (OLMC) and 8 programmable Buried Logic Macrocells (BLMC). In addition, there are 10 Input Logic Macrocells (ILMC) and 10 I/O Logic Macrocells (IOLMC). Two clock inputs are provided for independent control of the input and output macrocells. |
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Click here to download GAL6001B-30LP Datasheet*) |
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