The ISSI IS61LP12832 and IS61LP12836 is a high-speed synchronous static RAM designed to provide a burstable, high-performance memory for high speed networking and communication applications. It is organized as 131,072 words by 32 bits and 36 bits, fabricated with ISSI's advanced CMOS technology. The device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input. Write cycles are internally self-timed and are initiated by the rising edge of the clock input. Write cycles can be from one to four bytes wide as controlled by the write control inputs.