The ISSI IS42S32160A is a high-speed CMOS configured as a quad 4M x 32 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal,CLK). It is internally configured by stacking two 256Mb, 16 Meg x 16 devices. Each of the 4M x 32 bit banks is organized as 8192 rows by 512 columns by 32 bits. Read and write accesses start at a selected locations in a programmed sequence. Accesses begin with the registration of a BankActive command which is then followed by a Read or Write command. The ISSI IS42S32160A provides for programmable Read or Write burst lengths of 1,2,4,8,or full page, with a burst termination operation. An auto precharge function may be enable to provide a self-timed row precharge that is initiated at the end of the burst sequence.The refresh functions, either Auto or Self Refresh are easy to use.