The ISL6742 includes complemented PWM outputs for synchronous rectifier (SR) control. The complemented outputs may be dynamically advanced or delayed relative to the main outputs using an external control voltage. Its advanced current sensing circuitry employs sample and hold methods to provide a precise average current signal. Suitable for average current limiting, a technique which virtually eliminates the current tail-out common to peak current limiting methods, it is also applicable to current sharing circuits and average current mode control. This advanced BiCMOS design features an adjustable oscillator frequency up to 2MHz, internal over-temperature protection, precision deadtime control, and short propagation delays. Additionally, Multi-Pulse Suppression ensures alternating output pulses at low duty cycles where pulse skipping may occur.