The Intersil HCS166MS is an 8-bit shift register that has fully synchronous serial or parallel data entry selected by an active LOW Parallel Enable (PE) input. When the PE is LOW one setup time before the LOW-to-HIGH clock transition, parallel data is entered into the register. When PE is HIGH, data is entered into internal bit position Q0 from Serial Data Input (DS), and the remaining bits are shifted one place to the right (Q0 Q1 Q2m etc.) with each positive-going clock transition. For expansion of the register in parallel to serial converters, the Q7 output is connected to the DS input of the succeeding stage.