The Intersil HCTS191MS is a Radiation Hardened asynchronously presettable 4 bit binary up/down synchronous counter. Presetting the counter to the number on the preset data inputs (P0 - P3) is accomplished by a low asynchronous parallel load input (PL). Counting occurs when PL is high, Count Enable (CE) is low, and the Up/Down (U/D) input is either low for up-counting or high for down-counting. The counter is incremented or decremented synchronously with the low-to-high transition of the clock. When an overflow or underflow of the counter occurs, the Terminal Count output (TC), which is low during counting, goes high and remains high for one clock cycle. This output can be used for look-ahead carry in high speed cascading. The TC output also initiates the Ripple Clock output (RC) which, normally high, goes low and remains low for the low-level portion of the clock pulse. These counter can be cascaded using the Ripple Carry output.