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Partname: | IDT74SSTUBF32866B |
Description: | 25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 |
Manufacturer: | Integrated Device Technology |
Datasheet: | PDF (639K). Click here to download *) |
The device monitors both DCS and CSR inputs and will gate the Qn outputs from changing states when both DCS and CSR inputs are high. If either DCS and CSR input is low, the Qn outputs will function normally. The RESET input has priority over the DCS and CSR control and will force the outputs low. If the DCS-control functionality is not desired, then the CSR input can be hardwired to ground, in which case, the setup-time requirement for DCS would be the same as for the other D data inputs. Package options include 96-ball LFBGA (MO-205CC). |
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Click here to download IDT74SSTUBF32866B Datasheet*) |
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