The LVC374A octal edge triggered D-type flip-flop is built using advanced dual metal CMOS technology. This device features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The LVC374A device is particularly suitable for implementing buffer registers, input-output (I/O) ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The LVC374A has been designed with a 24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.