The LVC125A quadruple bus buffer gate is built using advanced dual metal CMOS technology. The LVC125A features independent line drivers with 3-state outputs. Each output is disabled when the associated outputenable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be tied to Vcc through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V system environment. The LVC125A has been designed with a 24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance.