The PA7128 is a member of the Programmable Electrically Erasable Logic (PEELTM) Array family based on ICT's CMOS EEPROM technology. PEELTM Arrays free designers from the limitations of ordinary PLDs by providing the architectural flexibility and speed needed for today's programmable logic designs. The PA7128 offers a versatile logic array architecture with 12 I/O pins, 14 input pins and 36 registers/latches (12 buried logic cells, 12 input registers/latches, 12 buried I/O registers/latches). Its logic array implements 50 sum-of-products logic functions that share 64 product terms. The PA7128's logic and I/O cells (LCCs, IOCs) are extremely flexible offering up to three output functions per cell (a total of 36 for all 12 logic cells). Cells are configurable as D, T and JK registers with independent