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Partname:ICS9112yG-16-T
Description:Low Skew Output Buffer
Manufacturer:
Datasheet:PDF (119K).
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The ICS9112-16 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in PC systems operating at speeds from 25 to 133 MHz.

Click here to download ICS9112yG-16-T Datasheet
Click here to download ICS9112yG-16-T Datasheet
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