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Partname: | ICS570BIT |
Description: | Multiplier and zero delay buffer |
Manufacturer: | |
Package: | SOIC |
Pins: | 8 |
Oper. temp.: | -40 to 85 |
Datasheet: | PDF (96K). Click here to download *) |
The ICS570B is a high performance Zero Delay Buffer (ZDB) which integrates ICS' proprietary analog/digital Phase Locked Loop (PLL) techniques. The ICS570B, part of ICS' ClockBlocksTM family, was designed as a performance upgrade to meet today's higher speed and lower voltage requirements. The zero delay feature means that the rising edge of the input clock aligns with the rising edges of both outputs, giving the appearance of no delay through the device. There are two outputs on the chip, one being a low-skew divide by two of the other. The device incorporates an all-chip power down/tri-state mode that stops the internal PLL and puts both outputs into a high impedance state. |
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 Click here to download ICS570BIT Datasheet*) |
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