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   | Partname: | ICS507M-01I |  | Description: | PECL clock synthesizer |  | Manufacturer: |  |  | Package: | SOIC |  | Pins: | 16 |  | Oper. temp.: | -40 to 85 |  | Datasheet: | PDF (49K). Click here to download *)
 |  | The ICS507-01 and ICS507-02 are inexpensive ways to generate a low jitter 155.52 MHz (or other high speed) differential PECL clock output from a low frequency crystal input. Using Phase-LockedLoop (PLL) techniques, the devices use a standard fundamental mode crystal to produce output clocks up to 200 MHz. |  |  |  | *)Datasheets downloading from ChipDocs is only for our members (paid service). REGISTER NOW for your membership. |  |  |  |