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Partname:ICS2509CyG-T
Description:3.3V Phase-Lock Loop Clock Driver
Manufacturer:
Datasheet:PDF (248K).
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The ICS2509C is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the CLKIN signal with the CLKOUT signal. It is specifically designed for use with synchronous SDRAMs. The ICS2509C operates at 3.3V VCC and drives up to nine clock loads.

Click here to download ICS2509CyG-T Datasheet
Click here to download ICS2509CyG-T Datasheet
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