ChipDocs - Datasheet Source for Semiconductor and Electronic Circuit Components
More than
480 798 
registered clients
Partname:HY57V64820HGT-H
Description:4 Banks x 2M x 8Bit Synchronous DRAM
Manufacturer:
Datasheet:PDF (134K).
Click here to download *)

The Hynix HY57V64820HG is a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the main memory applications which require large memory density and high bandwidth. HY57V64820HG is organized as 4banks of 2,097,152x8. HY57V64820HG is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL. Programmable options include the length of pipeline (Read latency of 2 or 3), the number of consecutive read or write cycles initiated by a single control command (Burst length of 1,2,4,8 or Full page), and the burst count sequence(sequential or interleave). A burst of read or write cycles in progress can be terminated by a burst terminate command or can be interrupted and replaced by a new burst read or write command on any cycle. (This pipelined design is not restricted by a `2N` rule.)

Click here to download HY57V64820HGT-H Datasheet
Click here to download HY57V64820HGT-H Datasheet
*)
*)Datasheets downloading from ChipDocs is only for our members (paid service). REGISTER NOW for your membership.
Free Electronics Engineering Subscription
Win Win Circuit - PCB,PCBA,Touch Screen,LED Lighting
Win Win Circuit LTD. PCB, PCBA, LCD Module
www.wwteq.com
COPYRIGHT 1997-2024 ChipDocs  ALL RIGHT RESERVED