The HD74LVCZ16245A has sixteen two direction buffers, for the fittest at two direction bus lines with three state outputs in a 48 pin package. When (DIR) is high, data flows from the A inputs to the B outputs, and when (DIR) is low, data flows from the B inputs to the A outputs. A and B bus are separated by making enable input (G) high level. When VCC is between 0 and 1.5 V, the device is in the high impedance state during power up or power down.