The HD74LV138A is designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. The conditions at the binary-select inputs and the three enable inputs select one of eight input lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter.