The HD74ALVCHR162269A is a 12-bit to 24-bit registered bus exchanger, which is intended for applications where two separate ports must be multiplexed onto, or de-multiplexed from, a single port. It is particularly suitable as an interface between synchronous DRAMs and high speed microprocessors. The HD74ALVCHR162269A is designed specifically for low voltage (from 2.5 V to 3.3 V) VCC operation. Data is stored in the internal B-port registers on the low to high transition of the CLK input, provided that the appropriate CLKENA inputs are low. Proper control of these inputs allows two sequential 12-bit words to be presented as a 24-bit word on the B-port. For data transfer in the B to A direction, a single storage register is provided. The SEL line selects 1B or 2B data for the A outputs. The register on the A output permits the fastest possible data transfer, thus extending the period that the data will be valid on the bus. The control pins are registered so that all transactions are synchronous with the clock. Data flows is controlled by the active low output enables (OEA, OEB1, OEB2). Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. All outputs, which are designed to sink up to 12 mA, include 26 resistors to reduce overshoot and undershoot.