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Partname:GS840F32AT-12I
Description:12ns 128K x 32 4Mb sync burst SRAM
Manufacturer:
Package:TFBGA
Pins:100
Oper. temp.:-40 to 85
Datasheet:PDF (650K).
Click here to download *)

The JEDEC Standard for Burst RAMS calls for a FT mode pin option (pin 14 on TQFP). Board sites for Flow Through Burst RAMS should be designed with VSS connected to the FT pin location to ensure the broadest access to multiple vendor sources. Boards designed with FT pin pads tied low may be stuffed with GSI's Pipeline/Flow Through-configurable Burst RAMS or any vendor's Flow Through or configurable Burst SRAM. Bumps designed with the FT pin location tied high or floating must employ a non-configurable Flow Through Burst RAM, like this RAM, to achieve flow through functionality.

Click here to download GS840F32AT-12I Datasheet
Click here to download GS840F32AT-12I Datasheet
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