These octal 3-STATE bus drivers are designed to provide the designer with flexibility in implementing a bus interface with memory, microprocessor, or communication systems. The output 3-STATE gating control is organized into two separate groups of four buffers. The DM74ALS240A control inputs symmetrically enable the respective outputs when set logic LOW, while the DM74ALS241A has complementary enable gating. The 3-STATE circuitry contains a feature that maintains the buffer outputs in 3-STATE (high impedance state) during power supply ramp-up or ramp-down. This eliminates bus glitching problems that arise during power-up and power-down.