These synchronous presettable counters feature an internal carry look ahead for application in high speed counting designs. The DM74ALS162B is a four-bit decade counter, while the DM74ALS161B and DM74ALS163B are four-bit binary counters. The DM74ALS161B clears asynchronously, while the DM74ALS162B and DM74ALS163B clear synchronously. The carry output is decoded to prevent spikes during normal counting mode of operation. Synchronous operation is provided by having all flip-flops clocked simultaneously so that outputs change coincident with each other when so instructed by count enable inputs and internal gating. This mode of operation eliminates the output counting spikes which are normally associated with asynchronous (ripple clock) counters. A buffered clock input triggers the four flip-flops on the rising (positivegoing) edge of the clock input waveform. These counters are fully programmable, that is, the outputs may be preset to either level. As presetting is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with set up data after the next clock pulse regardless of the levels of enable input. LOW-to-HIGH transitions at the load input are perfectly acceptable regardless of the logic levels on the clock or enable inputs.