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Partname: | CD4027BCN |
Description: | Dual J-K Master/Slave Flip-Flop with Set and Reset |
Manufacturer: | Fairchild Semiconductor |
Package: | DIP |
Pins: | 16 |
Datasheet: | PDF (65.3K). Click here to download *) |
The CD4027BC dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. Each flip-flop has independent J, K, set, reset, and clock inputs and buffered Q and Q outputs. These flip-flops are edge sensitive to the clock input and change state on the positive-going transition of the clock pulses. Set or reset is independent of the clock and is accomplished by a high level on the respective input. |
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Click here to download CD4027BCN Datasheet*) |
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