The EM636327 SGRAM is a high-speed CMOS synchronous graphics DRAM containing 16 Mbits. It is internally configured as a dual 256K x 32 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the 256K x 32 bit banks is organized as 1024 rows by 256 columns by 32 bits. Read and write accesses to the SGRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command. The EM636327 provides for programmable Read or Write burst lengths of 1, 2, 4, 8, or full