The circuit contains transmit and receive functions that share integrated high stability VCOs and a phase locked loop function ( PLL ). All functionality is controlled through a 3-wire bus interface with optional hard wire lines. The receive section comprises of a low noise image reject down conversion to the first intermediate frequency, an external channel filter, a second down convertion to a second intermediate frequency, an integrated channel pass filter, a high gain limiting amplifier, a received signal strenght indicator with DC compensation loop, a self aligned frequency discriminator and a preamble based data slicer. The transmit section comprises of a signal gate and a pre-power amplifier. Data transmission is achieved by direct open loop modulation of the Tx VCO.