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Partname: | HB5425161BTT-75B |
Description: | 256M; 133MHz LVTTL interface SDRAM |
Manufacturer: | |
Package: | TSOP |
Pins: | 66 |
Datasheet: | PDF (489K). Click here to download *) |
The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM devices. Read and write operations are performed at the cross points of the CLK and the C LK. This high speed data transfer is realized by the 2-bit prefetch piplined architecture. Data strobe (DQS) both for read and write are available for high speed and reliable data bus design. By setting extended mode resistor, the on-chip Delay Locked Loop (DLL) can be set enable or disable. |
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Click here to download HB5425161BTT-75B Datasheet*) |
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