The EDS5104AB is a 512M bits SDRAM organized as 33,554,432 words x 4 bits x 4 banks. The EDS5108AB is a 512M bits SDRAM organized as 16,777,216 words x 8 bits x 4 banks. The EDS5116AB is a 512M bits SDRAM organized as 8,388,608 words x 16 bits x 4 banks. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 54pin plastic TSOP (II).