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Partname: | EDE1108AESE |
Description: | 1G bits DDR2 SDRAM |
Manufacturer: | |
Datasheet: | PDF (785K). Click here to download *) |
The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver |
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![Click here to download EDE1108AESE Datasheet](../../../pndecoder/datasheets/ELPID/img/000278.gif) Click here to download EDE1108AESE Datasheet*) |
![](http://www.chipdocs.com/common/img/1x10t.gif) |
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