|
|
Partname: | EDD2508AKTA-5-E |
Description: | 256M bits DDR SDRAM (32M words x 8 bits, DDR400) |
Manufacturer: | |
Datasheet: | PDF (535K). Click here to download *) |
The EDD2508AKTA-5 is a 256M bits DDR SDRAM organized as 8,388,608 words x 8 bits x 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data transfer is realized by the 2 bits prefetch-pipelined architecture. Data strobe (DQS) both for read and write are available for high speed and reliable data bus design. By setting extended mode register, the on-chip Delay Locked Loop (DLL) can be set enable or disable. It is packaged in 66-pin plastic TSOP (II). |
|
Click here to download EDD2508AKTA-5-E Datasheet*) |
|
*)Datasheets downloading from ChipDocs is only for our members (paid service). REGISTER NOW for your membership. |
|
|
|