The CY7C1471BV33, CY7C1473BV33, and CY7C1475BV33 are 3.3V, 2M x 36/4M x 18/1M x 72 synchronous flow through burst SRAMs designed specifically to support unlimited true back-to-back read or write operations without the insertion of wait states. The CY7C1471BV33, CY7C1473BV33, and CY7C1475BV33 are equipped with the advanced No Bus Latency (NoBL) logic. NoBLTM is required to enable consecutive read or write operations with data being transferred on every clock cycle. This feature dramatically improves the throughput of data through the SRAM, especially in systems that require frequent write-read transitions.