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Partname: | CY7C1447AV33-133BGC |
Description: | 36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM |
Manufacturer: | Cypress Semiconductor |
Datasheet: | PDF (572K). Click here to download *) |
The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33 allows either interleaved or linear burst sequences, selected by the MODE input pin. A HIGH selects an interleaved burst sequence, while a LOW selects a linear burst sequence. Burst accesses can be initiated with the Processor Address Strobe (ADSP) or the cache Controller Address Strobe (ADSC) inputs. Address advancement is controlled by the Address Advancement (ADV) input. |
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Click here to download CY7C1447AV33-133BGC Datasheet*) |
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