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Partname: | CY7C1383CV25-117BZI |
Description: | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM |
Manufacturer: | Cypress Semiconductor |
Datasheet: | PDF (501K). Click here to download *) |
The CY7C1381CV25/CY7C1383CV25 allows either interleaved or linear burst sequences, selected by the MODE input pin. A HIGH selects an interleaved burst sequence, while a LOW selects a linear burst sequence. Burst accesses can be initiated with the Processor Address Strobe (ADSP) or the cache Controller Address Strobe (ADSC) inputs. Address advancement is controlled by the Address Advancement (ADV) input. |
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Click here to download CY7C1383CV25-117BZI Datasheet*) |
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